AMD Drops Rome 2 Pricing Ahead of Q2 Data Center Earnings
Aggressive cuts target hyperscale rack density wins against Intel Granite Rapids.
Analysis — Silicon
Inside NVIDIA's Next Memory Architecture
inside nvidia s next memory architecture
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Today’s News
Cloudflare Rolls Out Post-Quantum Key Exchange Across Its Entire Edge Network
ML-KEM now default on all TLS 1.3 handshakes; opt-out available for legacy devices.
Google Spanner Adds Multi-Region Write Coalescing in Private Preview
Reduces cross-region write latency by up to 40% for globally distributed OLTP workloads.
TSMC Arizona Fab Yields Hit 80% on N3E — Six Months Ahead of Schedule
First domestically-produced 3nm wafers ship to Apple and NVIDIA this quarter.
Linux 6.9 Merges Rust-Written NVMe Driver as Non-Default Option
Safe-Rust implementation passes all existing kernel conformance tests; performance parity confirmed on Gen 5 SSDs.
Reference
Research Briefs
AI Infra
Transformer Inference Batching: A Practitioner’s Field Guide
Continuous batching, PagedAttention, and chunked prefill explained from first principles — with latency/throughput tradeoff curves for H100 and A100 clusters.
Data Centers
Liquid Cooling Retrofit Economics: Air-to-DLC Cost Model
We model the CapEx/OpEx crossover point for direct liquid cooling retrofits across four standard rack densities — 10, 20, 40, and 80 kW.
Silicon
Chiplet Packaging Compared: CoWoS vs. EMIB vs. Foveros
Side-by-side comparison of TSMC, Intel, and AMD’s advanced packaging approaches — bandwidth, yield, cost, and ecosystem maturity as of Q1 2026.
Interconnects
RoCE v2 vs. InfiniBand in 2026: An Updated Benchmark
Updated head-to-head latency, bandwidth, and configuration complexity data for large-scale AI training fabrics, including Spectrum-X results on 400G links.
Deep dives
Analysis
AI Infra
“The Scheduler Is the Product”: Oxide Computer’s Steve Tuck on Why Cloud Abstraction Has Gone Too Far
Tuck argues that every IaaS layer operators can’t inspect is a layer they can’t optimize. We talk through Oxide’s rack-scale architecture, the tradeoffs of owning firmware, and where the hyperscaler model breaks for regulated industries.
Power & Thermal
The 400 kW Rack Problem: How Power Delivery Architecture Is Becoming a First-Class Design Constraint
As GPU clusters push past 100 kW per rack, the power delivery network — not compute — is becoming the binding constraint. We map the electrical architecture choices operators face from the utility substation down to the VRM.
Silicon
Arm vs. x86 in the Server Room: A 2026 Recount
Graviton 4, Neoverse N2, and Ampere Altra Max go under the microscope against Intel Granite Rapids for mixed-workload enterprise deployments. The performance-per-watt gap is narrowing faster than most procurement teams realize.
Data Centers
The Hyperscaler Land Rush: Why Every Major Cloud Is Locking Up Land Near Nuclear Plants
Over the past 18 months, Microsoft, Google, and Amazon have quietly signed options on land adjacent to eight operating nuclear facilities. We map the acquisitions and explain the power-density math driving the strategy.
